Field
Embodiments of the present disclosure generally relate to methods for processing one or more substrates, and more specifically to methods for performing photolithography processes.
Description of the Related Art
Microlithography techniques are generally employed to create electrical features incorporated as part of a die formed on a substrate. According to this technique, a light-sensitive photoresist is typically applied to a surface of the substrate. Then, a pattern generator exposes selected areas of the light-sensitive photoresist as part of a pattern with light to cause chemical changes to the photoresist in the selective areas to create a mask. The mask is utilized to transfer a pattern during the creation of the electrical features that eventually make up the die.
However, as multiple operations are involved in the formation of the electrical features, high placement accuracy for masks forming the individual dies are required to align the connections. The placement accuracy requirement limits throughput and increase cost. Warpage of the substrate, among other issues, can lead to connection misplacement in the individual dies. Excessive die drift during pick-and-place operation also contribute to yield loss. Thus, misplacing cingulated chips to form a molded panel can lead to pattern overlay difficulties in the buildup process when traditional lithography is used.
Therefore, there is a need for an improved system and method for photolithography.